1. Field of the Invention
The present invention generally relates to integrated circuits and, more particularly, to, for example, Dynamic Random Access Memories (DRAMs) with Built In Self Test (BIST) Capability.
2. Background Description
FIG. 1 is a block diagram of a typical page mode Dynamic Random Access Memory (DRAM) chip with Built In Self Test (BIST) capability. The chip includes a DRAM 100 and a conventional BIST engine 200 that tests the DRAM 100 according to commands defined in a Microprogram ROM 300.
The test program for this prior art BIST engine 200 may be varied only by changing microcode that is fixed permanently in the microprogram ROM 300. All test conditions and test sequences are unalterably stored in the microprogram ROM 300. Thus, regardless of BIST results, the entire microprogram must be executed. Even if more rigorous tests might be desired, they cannot be added without reprogramming the microprogram ROM 300.